chip-to-chip alignment, and chip-to-chip gaps as small as five microns. In addition to enabling an entirely new class of system designs, utilizing QP can result in significant cost reduction by partitioning large, poorer-yielding chips and “reconstituting” them from smaller, higher-yielding chips, without reducing performance or functionality. Improvements in time-to-market, power consumption, form-factor, and yield are possible with the adoption of QP, as well as increased flexibility in mixing and matching IP cores and existing designs.

It was founded in 2009 and is headquartered in South Bend, Indiana.